Nanocomputing is a recent research branch which is carried on at the VLSI Lab. The main goal is to investigate how to overcome the limitations of current computational systems by exploiting the possibilities offered by emerging technologies and unconventional architectures. The end of Moore’s Law and the scaling of MOS transistors has lead to the development of a huge number of new technologies. The nature of these technologies is often very different from transistors. As a consequence old architectural concepts cannot be applied effectively to these new technologies.
When studying emerging technologies the research cannot stop at the device level. To understand the limitations of a new device it is necessary to design complex and realistic circuits. Only at this point, it is possible to understand the effectiveness of a new technology. The reason is quite simple: parameters like speed and power consumption can be evaluated accurately only at the system level. The outcomes of designing a new architecture based on a new technology are two. First, it is possible to understand the performance of that technology. Second, it highlights the strength and the limitations of such technology. It is, therefore, possible to go back at the device level and modify the device itself to solve the issues found.
This methodology is the key point of the research carried on at the VLSI lab. Device and architectures are studied together creating a positive loop that brings to the enhancement and to the discovery of new technologies and architectures.
The Von Neumann architecture is the back-bone of most of modern computational systems. In this model logic and memory are two separated entities. This architectural model was successfully employed throughout the entire history of electronics. It is a model that worked very well especially in conjunction with the scaling of transistors. However it is now showing all its limits because the logic part is much faster than the memory, so the performance is bottlenecked by the memory. The aim of this research branch carried on at the VLSI group is twofold: to study new kind of architectures, free from the limitations of the Von Neumann model, and to successfully exploit emerging technologies. Parallelism and massive parallelism, logic-in-memory, and brain-inspired computation are all keywords that we follow in developing these new “unconventional architectures”.
Since the limitation is the interaction with the memory, the successful implementation of the logic-in-memory or in-memory computing principle can be the key to the future development of computational systems. A circuit where logic and memory are merged into one single entity does not suffer from bandwidth limitations or similar problems. To successfully implement logic-in-memory circuits it is possible to employ new technologies where the device behaves both as a logic and memory element. Parallelization, memory locality, and 3-dimensionality are instead exploited to design circuits where memory is physically located near the logic units. Finally, the brain is taken as inspiration for its efficiency in both power consumption and parallelization.
The end of MOS scaling process as generated an incredibility number of new technologies that are currently under development. Many of them are profoundly different from transistors in both their physical structure and their behavior. If the same old architectures are used in combination with emerging technologies the results may be much different from what obtained with MOS transistors. An example can be done using field coupled devices, where the fastest adder is the ripple carry adder that is the slowest adder in MOS technology. The aim of this part of the research is the development of new architectures adapted to the characteristics of each new technology.
Once was clear that the scaling of transistors was reaching its limit, researcher started to study new technologies able to overcome these limits. These technologies are generally called emerging technologies. They can be roughly divided into 4 macro-categories, spintronic devices, molecular and atomistic devices, resistive devices and advanced transistors. The research carried on at the VLSI covers mainly spintronic devices, molecular devices, and advanced FET devices.
Spintronic is a branch of electronics that deals with spin-polarized currents. The discovery of spintronics was the breakthrough the lead to modern high-density hard drives and the newly developed magnetic RAMs. There are two main devices at the base of spintronics, GMRs (Giant Magneto-Resistances) and MTJs (Magneto-Tunnel Junctions). Both can be seen as variable resistances where the resistance value depends on the magnetic state of the device.
While GMR and MTJ are commercially available devices, a big number of other devices has been investigated at research level. Some of these devices are currently studied at the VLSI lab, like NanoMagnet Logic (NML) and perpendicular NML (pNML). These new devices are interesting because they offer features not available in MOS-based circuits, like the ability to combine memory and logic on a single device, the intrinsic ability to fabricate 3D circuits and no standby power consumption. A recently developed branch of this research has led to the development of the Racetrack Logic, Logic-in-Memory devices based upon racetrack memories. A racetrack logic element can be seen as a memory element that is also able to perform logic operations on the stored information.
Modern high-performance transistors have now reached a size of few tenth of a nanometer, they are almost approaching the threshold of 10nm. Under this size their production will be no more economical sustainable, ending therefore their development. As a consequence researcher are trying to investigate how to use single molecules or atoms as building blocks for computational systems. It is indeed a very challenging field. Molecules and atoms are very sensitive to thermal noise so it is really difficult to obtain a bistable (digital) systems. Furthermore the fabrication of such circuits poses serious challenges.
At the VLSI lab molecular devices are currently under investigation. Different kind of molecular devices are studied: Molecular FETs, Molecular Electrical Field Coupled molecular devices and recently also Magnetic Field Coupled Molecular devices. These new devices are studied at low level using physical simulators. These simulations are used to develop models that can be employed to design circuits and understand therefore the potential of molecular devices. While the work is carried on mainly at simulation level, a particular attention is kept forward to the fabrication of these devices. The structures that are studied keep into account fabrication constraints and, when it is possible, experimental activities are used to support the simulations.
While there is nowadays little room for improvements of MOSFET technology. Other types of transistors are studied to continue, if possible, the development of transistor-based circuits. Some of these devices are now already in production, like FinFET transistors, others are still at the research phase, lige Gate All Around (GAA) transistors. These kind of devices maintains the characteristics of FETs but, thanks to a slightly different structure, they can be scaled a little bit beyond the limitation of traditional FETs.
At the VLSI lab these kind of devices are currently under investigations. The focus is mainly on FinFETs, GAAs, Silicon Nanowire transistors and Tunnel FETs. These devices are studied following the approach typically used in this lab: physical simulations and models are used in conjunction to understand the potential of a technology both at device and system level. This kind of technologies are studied with the help of TAMTAMS, an online tool that can be used to study and compare a transistor-like technology at device level and to estimate its performance at system level.